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A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths., , и . Journal of Circuits, Systems, and Computers, 11 (4): 405-428 (2002)A Low Complexity High Quality Interger Motion Estimation Architecture Design for H.264/AVC., , , , , , и . APCCAS, стр. 398-401. IEEE, (2006)Low compute complexity BU-based rate control algorithm for H.264/AVC encoder., и . APCCAS, стр. 564-567. IEEE, (2010)A high-speed dual-phase processing pipelined domino circuit design with a built-in performance adjusting mechanism., и . VLSI-DAT, стр. 1-4. IEEE, (2012)A 3D hand tracking design for gesture control in complex environments., , и . VLSI-DAT, стр. 1-4. IEEE, (2015)A High-Speed/Low-Power Multiplier Using an Advanced Spurious Power Suppression Technique., , , и . ISCAS, стр. 3139-3142. IEEE, (2007)Design of a new signal security system., и . ISCAS (4), стр. 121-124. IEEE, (2002)A new group distributed arithmetic design for the one dimensional discrete Fourier transform., , и . ISCAS (1), стр. 421-424. IEEE, (2002)A power-aware IP core generator for the one-dimensional discrete Fourier transform., , , и . ISCAS (3), стр. 637-640. IEEE, (2004)An Adaptive Cross-Window stereo camera Distance Estimation technology and its system implementation for multiple applications., , и . VLSI-DAT, стр. 1-4. IEEE, (2017)