%0 Conference Paper %1 conf/async/MoreiraAGC14 %A Moreira, Matheus Trevisan %A Arendt, Michel Evandro %A Guazzelli, Ricardo Aquino %A Calazans, Ney Laert Vilar %B ASYNC %D 2014 %I IEEE Computer Society %K dblp %P 93-100 %T A New CMOS Topology for Low-Voltage Null Convention Logic Gates Design. %U http://dblp.uni-trier.de/db/conf/async/async2014.html#MoreiraAGC14 %@ 978-1-4799-3789-9

@inproceedings{conf/async/MoreiraAGC14, added-at = {2023-03-23T00:00:00.000+0100}, author = {Moreira, Matheus Trevisan and Arendt, Michel Evandro and Guazzelli, Ricardo Aquino and Calazans, Ney Laert Vilar}, biburl = {https://www.bibsonomy.org/bibtex/207be213a8e16eb4bfda4877900845f5c/dblp}, booktitle = {ASYNC}, crossref = {conf/async/2014}, ee = {https://doi.ieeecomputersociety.org/10.1109/ASYNC.2014.20}, interhash = {aed420a93675d087dac0a78a1d47c993}, intrahash = {07be213a8e16eb4bfda4877900845f5c}, isbn = {978-1-4799-3789-9}, keywords = {dblp}, pages = {93-100}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T10:57:14.000+0200}, title = {A New CMOS Topology for Low-Voltage Null Convention Logic Gates Design.}, url = {http://dblp.uni-trier.de/db/conf/async/async2014.html#MoreiraAGC14}, year = 2014 }