%0 Conference Paper %1 conf/dac/ZhaoLSZYGY17 %A Zhao, Qinghang %A Liu, Yongpan %A Sun, Wenyu %A Zhao, Jiaqing %A Yao, Hailong %A Guo, Xiaojun %A Yang, Huazhong %B DAC %D 2017 %I ACM %K dblp %P 80:1-80:6 %T Design Methodology for Thin-Film Transistor Based Pseudo-CMOS Logic Array with Multi-Layer Interconnect Architecture. %U http://dblp.uni-trier.de/db/conf/dac/dac2017.html#ZhaoLSZYGY17 %@ 978-1-4503-4927-7

@inproceedings{conf/dac/ZhaoLSZYGY17, added-at = {2018-11-06T00:00:00.000+0100}, author = {Zhao, Qinghang and Liu, Yongpan and Sun, Wenyu and Zhao, Jiaqing and Yao, Hailong and Guo, Xiaojun and Yang, Huazhong}, biburl = {https://www.bibsonomy.org/bibtex/2f3a2ddc4bb9ff40fdbb84fed5302f778/dblp}, booktitle = {DAC}, crossref = {conf/dac/2017}, ee = {https://doi.org/10.1145/3061639.3062227}, interhash = {c0cc02a4782cbfb8c8b64af49c266c5e}, intrahash = {f3a2ddc4bb9ff40fdbb84fed5302f778}, isbn = {978-1-4503-4927-7}, keywords = {dblp}, pages = {80:1-80:6}, publisher = {ACM}, timestamp = {2018-11-07T13:09:51.000+0100}, title = {Design Methodology for Thin-Film Transistor Based Pseudo-CMOS Logic Array with Multi-Layer Interconnect Architecture.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2017.html#ZhaoLSZYGY17}, year = 2017 }