%0 Conference Paper %1 conf/vlsid/VenkatesanNPMV23 %A Venkatesan, Aparajithan Nathamuni %A Narayanan, Ram Venkat %A Pula, Kishore %A Muthukumaran, Sundarakumar %A Vemuri, Ranga %B VLSID %D 2023 %I IEEE %K dblp %P 389-394 %T Word-Level Structure Identification In FPGA Designs Using Cell Proximity Information. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2023.html#VenkatesanNPMV23 %@ 979-8-3503-4678-7

@inproceedings{conf/vlsid/VenkatesanNPMV23, added-at = {2023-04-22T00:00:00.000+0200}, author = {Venkatesan, Aparajithan Nathamuni and Narayanan, Ram Venkat and Pula, Kishore and Muthukumaran, Sundarakumar and Vemuri, Ranga}, biburl = {https://www.bibsonomy.org/bibtex/2cbc902ef0817f3992e97c89bcf536b5c/dblp}, booktitle = {VLSID}, crossref = {conf/vlsid/2023}, ee = {https://doi.org/10.1109/VLSID57277.2023.00083}, interhash = {ef47d52e1229379dbb21e189042fe5a2}, intrahash = {cbc902ef0817f3992e97c89bcf536b5c}, isbn = {979-8-3503-4678-7}, keywords = {dblp}, pages = {389-394}, publisher = {IEEE}, timestamp = {2024-04-10T01:04:54.000+0200}, title = {Word-Level Structure Identification In FPGA Designs Using Cell Proximity Information.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2023.html#VenkatesanNPMV23}, year = 2023 }