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%0 Journal Article
%1 journals/jssc/HayashiAWYKSDNNK13
%A Hayashi, Isamu
%A Amano, Teruhiko
%A Watanabe, Naoya
%A Yano, Yuji
%A Kuroda, Yasuto
%A Shirata, M.
%A Dosaka, Katsumi
%A Nii, Koji
%A Noda, Hideyuki
%A Kawai, Hiroyuki
%D 2013
%J IEEE J. Solid State Circuits
%K dblp
%N 11
%P 2671-2680
%T A 250-MHz 18-Mb Full Ternary CAM With Low-Voltage Matchline Sensing Scheme in 65-nm CMOS.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc48.html#HayashiAWYKSDNNK13
%V 48
@article{journals/jssc/HayashiAWYKSDNNK13,
added-at = {2020-08-30T00:00:00.000+0200},
author = {Hayashi, Isamu and Amano, Teruhiko and Watanabe, Naoya and Yano, Yuji and Kuroda, Yasuto and Shirata, M. and Dosaka, Katsumi and Nii, Koji and Noda, Hideyuki and Kawai, Hiroyuki},
biburl = {https://www.bibsonomy.org/bibtex/279f440a9df13ed5d15b304271429f4b5/dblp},
ee = {https://doi.org/10.1109/JSSC.2013.2274888},
interhash = {f8c412d1e43519d089787887d3c8947d},
intrahash = {79f440a9df13ed5d15b304271429f4b5},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 11,
pages = {2671-2680},
timestamp = {2020-08-31T11:41:42.000+0200},
title = {A 250-MHz 18-Mb Full Ternary CAM With Low-Voltage Matchline Sensing Scheme in 65-nm CMOS.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc48.html#HayashiAWYKSDNNK13},
volume = 48,
year = 2013
}