%0 Conference Paper %1 conf/aspdac/WangPMC04 %A Wang, Hua %A Papanikolaou, Antonis %A Miranda, Miguel %A Catthoor, Francky %B ASP-DAC %D 2004 %E Imai, Masaharu %I IEEE Computer Society %K dblp %P 759-761 %T A global bus power optimization methodology for physical design of memory dominated systems by coupling bus segmentation and activity driven block placement. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2004.html#WangPMC04 %@ 0-7803-8175-0

@inproceedings{conf/aspdac/WangPMC04, added-at = {2023-03-23T00:00:00.000+0100}, author = {Wang, Hua and Papanikolaou, Antonis and Miranda, Miguel and Catthoor, Francky}, biburl = {https://www.bibsonomy.org/bibtex/2703775ba254a68d46acf600613249616/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2004}, editor = {Imai, Masaharu}, ee = {https://dl.acm.org/citation.cfm?id=1015294}, interhash = {793e2d73a7e35fa75947e459a2da43bb}, intrahash = {703775ba254a68d46acf600613249616}, isbn = {0-7803-8175-0}, keywords = {dblp}, pages = {759-761}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:15:59.000+0200}, title = {A global bus power optimization methodology for physical design of memory dominated systems by coupling bus segmentation and activity driven block placement.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2004.html#WangPMC04}, year = 2004 }