%0 Journal Article %1 journals/tcas/HsuWY06 %A Hsu, Huai-Yi %A Wu, An-Yeu %A Yeo, Jih-Chiang %D 2006 %J IEEE Trans. Circuits Syst. II Express Briefs %K dblp %N 11 %P 1245-1249 %T Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems. %U http://dblp.uni-trier.de/db/journals/tcas/tcasII53.html#HsuWY06 %V 53-II

@article{journals/tcas/HsuWY06, added-at = {2020-05-27T00:00:00.000+0200}, author = {Hsu, Huai-Yi and Wu, An-Yeu and Yeo, Jih-Chiang}, biburl = {https://www.bibsonomy.org/bibtex/2818e757a00dac5754d1ec1ec0dc75bb3/dblp}, ee = {https://doi.org/10.1109/TCSII.2006.882360}, interhash = {19adb05a5ac3c1aeff5ee94aba699f52}, intrahash = {818e757a00dac5754d1ec1ec0dc75bb3}, journal = {IEEE Trans. Circuits Syst. II Express Briefs}, keywords = {dblp}, number = 11, pages = {1245-1249}, timestamp = {2020-05-28T11:53:39.000+0200}, title = {Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasII53.html#HsuWY06}, volume = {53-II}, year = 2006 }