%0 Conference Paper %1 conf/vlsid/LeBS07 %A Le, Kim T. %A Baik, Dong Hyun %A Saluja, Kewal K. %B VLSI Design %D 2007 %I IEEE Computer Society %K dblp %P 769-774 %T Test Time Reduction to Test for Path-Delay Faults using Enhanced Random-Access Scan. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2007.html#LeBS07 %@ 0-7695-2762-0

@inproceedings{conf/vlsid/LeBS07, added-at = {2023-03-24T00:00:00.000+0100}, author = {Le, Kim T. and Baik, Dong Hyun and Saluja, Kewal K.}, biburl = {https://www.bibsonomy.org/bibtex/2827251d809901dbf053045e8c802b7b3/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2007}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2007.156}, interhash = {ca361f860bc30c91d986ffd0854fcab7}, intrahash = {827251d809901dbf053045e8c802b7b3}, isbn = {0-7695-2762-0}, keywords = {dblp}, pages = {769-774}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:09.000+0200}, title = {Test Time Reduction to Test for Path-Delay Faults using Enhanced Random-Access Scan.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2007.html#LeBS07}, year = 2007 }