%0 Conference Paper %1 conf/ismvl/PrzigodaDWD16 %A Przigoda, Nils %A Dueck, Gerhard W. %A Wille, Robert %A Drechsler, Rolf %B ISMVL %D 2016 %I IEEE Computer Society %K dblp %P 44-49 %T Fault Detection in Parity Preserving Reversible Circuits. %U http://dblp.uni-trier.de/db/conf/ismvl/ismvl2016.html#PrzigodaDWD16 %@ 978-1-4673-9489-5

@inproceedings{conf/ismvl/PrzigodaDWD16, added-at = {2023-03-23T00:00:00.000+0100}, author = {Przigoda, Nils and Dueck, Gerhard W. and Wille, Robert and Drechsler, Rolf}, biburl = {https://www.bibsonomy.org/bibtex/2bfe663757afaf84d1e7464b31eeb951a/dblp}, booktitle = {ISMVL}, crossref = {conf/ismvl/2016}, ee = {https://www.wikidata.org/entity/Q59242027}, interhash = {65c97af37a362ba4c7d7bc1f39254932}, intrahash = {bfe663757afaf84d1e7464b31eeb951a}, isbn = {978-1-4673-9489-5}, keywords = {dblp}, pages = {44-49}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T17:17:28.000+0200}, title = {Fault Detection in Parity Preserving Reversible Circuits.}, url = {http://dblp.uni-trier.de/db/conf/ismvl/ismvl2016.html#PrzigodaDWD16}, year = 2016 }