%0 Generic %1 sharma2013based %A Sharma, Davinder Pal %B 2013 Information Technology and Power Electronics %D 2013 %E Sharma, Davinder Pal %I ACEEE (A Computer division of IDES) %K UWB communication scrambler systems %T FPGA based Data Scrambler for Ultra-Wideband Communication Systems %U http://searchdl.org/public/book_series/LSCS/4/16.pdf %X Ultra-Wideband (UWB) communication systems are currently the focus of research and development in wireless personal area networks (WPANs). These systems are capable of transferring data from a rate of 110Mbps to 480Mbps in realistic multipath environment. They consume very little power and silicon area. In such systems, synchronization plays very critical role to ensure correct and reliable system operation. Improper synchronization can introduce timing errors during transmission that can be eliminated using a device called scrambler. In this paper, the scrambler for UWB communication systems has been modeled and simulated using Matlab and Xilinx’s System Generator for DSP (Digital Signal Processing). Implementation of the scrambler has also been done on Spartan 3E FPGA (Field Programmable Gate Array) chip using Xilinx’s ISE Design Suite and results are compared.

@conference{sharma2013based, abstract = {Ultra-Wideband (UWB) communication systems are currently the focus of research and development in wireless personal area networks (WPANs). These systems are capable of transferring data from a rate of 110Mbps to 480Mbps in realistic multipath environment. They consume very little power and silicon area. In such systems, synchronization plays very critical role to ensure correct and reliable system operation. Improper synchronization can introduce timing errors during transmission that can be eliminated using a device called scrambler. In this paper, the scrambler for UWB communication systems has been modeled and simulated using Matlab and Xilinx’s System Generator for DSP (Digital Signal Processing). Implementation of the scrambler has also been done on Spartan 3E FPGA (Field Programmable Gate Array) chip using Xilinx’s ISE Design Suite and results are compared.}, added-at = {2014-02-04T11:12:00.000+0100}, author = {Sharma, Davinder Pal}, biburl = {https://www.bibsonomy.org/bibtex/2e6ac976ba898ad24fc1efb166e4a4ef0/idescitation}, booktitle = {2013 Information Technology and Power Electronics}, editor = {Sharma, Davinder Pal}, interhash = {52c9df3d0011052ac15fd716d5986574}, intrahash = {e6ac976ba898ad24fc1efb166e4a4ef0}, keywords = {UWB communication scrambler systems}, organization = {Institute of Doctors Engineers and Scientists}, publisher = {ACEEE (A Computer division of IDES)}, timestamp = {2014-02-04T11:12:00.000+0100}, title = {FPGA based Data Scrambler for Ultra-Wideband Communication Systems}, url = {http://searchdl.org/public/book_series/LSCS/4/16.pdf}, year = 2013 }