%0 Conference Paper %1 conf/asscc/JinKHMS16 %A Jin, Wei %A Kim, Seongjong %A He, Weifeng %A Mao, Zhigang %A Seok, Mingoo %B A-SSCC %D 2016 %I IEEE %K dblp %P 129-132 %T A 0.35V 1.3pJ/cycle 20MHz 8-bit 8-tap FIR core based on wide-pulsed-latch pipelines. %U http://dblp.uni-trier.de/db/conf/asscc/asscc2016.html#JinKHMS16 %@ 978-1-5090-3700-1

@inproceedings{conf/asscc/JinKHMS16, added-at = {2018-02-26T00:00:00.000+0100}, author = {Jin, Wei and Kim, Seongjong and He, Weifeng and Mao, Zhigang and Seok, Mingoo}, biburl = {https://www.bibsonomy.org/bibtex/20092c2c6c991e5faa64c8490af1f5b8d/dblp}, booktitle = {A-SSCC}, crossref = {conf/asscc/2016}, ee = {https://doi.org/10.1109/ASSCC.2016.7844152}, interhash = {400f83e1867835a0b09c543eae855ba4}, intrahash = {0092c2c6c991e5faa64c8490af1f5b8d}, isbn = {978-1-5090-3700-1}, keywords = {dblp}, pages = {129-132}, publisher = {IEEE}, timestamp = {2018-02-27T11:46:23.000+0100}, title = {A 0.35V 1.3pJ/cycle 20MHz 8-bit 8-tap FIR core based on wide-pulsed-latch pipelines.}, url = {http://dblp.uni-trier.de/db/conf/asscc/asscc2016.html#JinKHMS16}, year = 2016 }