%0 Conference Paper %1 conf/iceee/Arce-ZavalaMG15 %A Arce-Zavala, José M. %A Medina-Vázquez, Agustín Santiago %A Gurrola-Navarro, Marco Antonio %B CCE %D 2015 %I IEEE %K dblp %P 1-4 %T Design and validation of a mixed-signal correlator using a multiple-input floating gate transistor. %U http://dblp.uni-trier.de/db/conf/iceee/iceee2015.html#Arce-ZavalaMG15 %@ 978-1-4673-7839-0

@inproceedings{conf/iceee/Arce-ZavalaMG15, added-at = {2017-09-16T00:00:00.000+0200}, author = {Arce-Zavala, José M. and Medina-Vázquez, Agustín Santiago and Gurrola-Navarro, Marco Antonio}, biburl = {https://www.bibsonomy.org/bibtex/237a846c1f202e004366345310d7680f4/dblp}, booktitle = {CCE}, crossref = {conf/iceee/2015}, ee = {https://doi.org/10.1109/ICEEE.2015.7357913}, interhash = {759b79207a7b4ac58766b3794f16b24a}, intrahash = {37a846c1f202e004366345310d7680f4}, isbn = {978-1-4673-7839-0}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2019-10-17T13:47:50.000+0200}, title = {Design and validation of a mixed-signal correlator using a multiple-input floating gate transistor.}, url = {http://dblp.uni-trier.de/db/conf/iceee/iceee2015.html#Arce-ZavalaMG15}, year = 2015 }