%0 Conference Paper %1 conf/isvlsi/SrinivasaMCHLCG17 %A Srinivasa, Srivatsa Rangachar %A Mohan, Karthik %A Chen, Wei-Hao %A Hsu, Kuo-Hsinag %A Li, Xueqing %A Chang, Meng-Fan %A Gupta, Sumeet Kumar %A Sampson, John %A Narayanan, Vijaykrishnan %B ISVLSI %D 2017 %I IEEE Computer Society %K %P 128-133 %T Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via. %U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2017.html#SrinivasaMCHLCG17 %@ 978-1-5090-6762-6

@inproceedings{conf/isvlsi/SrinivasaMCHLCG17, added-at = {2023-12-13T01:55:03.000+0100}, author = {Srinivasa, Srivatsa Rangachar and Mohan, Karthik and Chen, Wei-Hao and Hsu, Kuo-Hsinag and Li, Xueqing and Chang, Meng-Fan and Gupta, Sumeet Kumar and Sampson, John and Narayanan, Vijaykrishnan}, biburl = {https://www.bibsonomy.org/bibtex/295415ae38696ef0410a75f04a82ed010/admin}, booktitle = {ISVLSI}, crossref = {conf/isvlsi/2017}, ee = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2017.31}, interhash = {7844c8451e496aa07243536a2002055d}, intrahash = {95415ae38696ef0410a75f04a82ed010}, isbn = {978-1-5090-6762-6}, keywords = {}, pages = {128-133}, publisher = {IEEE Computer Society}, timestamp = {2023-12-13T01:55:03.000+0100}, title = {Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via.}, url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2017.html#SrinivasaMCHLCG17}, year = 2017 }