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- BibTeX key
- conf/esscirc/DevlinJNIA09
- entry type
- inproceedings
- booktitle
- ESSCIRC
- year
- 2009
- pages
- 156-159
- publisher
- IEEE
- crossref
- conf/esscirc/2009
- ee
- https://doi.org/10.1109/ESSCIRC.2009.5326010
- isbn
- 978-1-4244-4354-3
- url
- http://dblp.uni-trier.de/db/conf/esscirc/esscirc2009.html#DevlinJNIA09
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- please select -%0 Conference Paper
%1 conf/esscirc/DevlinJNIA09
%A Devlin, Benjamin Stefan
%A Jeong, MyeongGyu
%A Nakura, Toru
%A Ikeda, Makoto
%A Asada, Kunihiro
%B ESSCIRC
%D 2009
%I IEEE
%K dblp
%P 156-159
%T 647 MHz, 0.642pJ/block/cycle 65nm self synchronous FPGA.
%U http://dblp.uni-trier.de/db/conf/esscirc/esscirc2009.html#DevlinJNIA09
%@ 978-1-4244-4354-3
@inproceedings{conf/esscirc/DevlinJNIA09,
added-at = {2020-07-07T00:00:00.000+0200},
author = {Devlin, Benjamin Stefan and Jeong, MyeongGyu and Nakura, Toru and Ikeda, Makoto and Asada, Kunihiro},
biburl = {https://www.bibsonomy.org/bibtex/24bedd9cebf1327a3a129b4a80f5e2aeb/dblp},
booktitle = {ESSCIRC},
crossref = {conf/esscirc/2009},
ee = {https://doi.org/10.1109/ESSCIRC.2009.5326010},
interhash = {88648e259569905c6b50d878209907f2},
intrahash = {4bedd9cebf1327a3a129b4a80f5e2aeb},
isbn = {978-1-4244-4354-3},
keywords = {dblp},
pages = {156-159},
publisher = {IEEE},
timestamp = {2024-04-09T17:24:57.000+0200},
title = {647 MHz, 0.642pJ/block/cycle 65nm self synchronous FPGA.},
url = {http://dblp.uni-trier.de/db/conf/esscirc/esscirc2009.html#DevlinJNIA09},
year = 2009
}