%0 Journal Article %1 journals/tcad/ZhaoZ22 %A Zhao, Zhenxin %A Zhang, Lihong %D 2022 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 12 %P 5138-5151 %T Analog Integrated Circuit Topology Synthesis With Deep Reinforcement Learning. %U http://dblp.uni-trier.de/db/journals/tcad/tcad41.html#ZhaoZ22 %V 41

@article{journals/tcad/ZhaoZ22, added-at = {2022-12-05T00:00:00.000+0100}, author = {Zhao, Zhenxin and Zhang, Lihong}, biburl = {https://www.bibsonomy.org/bibtex/2295364324d9d3dc2ec272dbcd1fe1735/dblp}, ee = {https://doi.org/10.1109/TCAD.2022.3153437}, interhash = {9b42d9e6b42090e1ec028585c02ac4d6}, intrahash = {295364324d9d3dc2ec272dbcd1fe1735}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 12, pages = {5138-5151}, timestamp = {2024-04-08T19:47:28.000+0200}, title = {Analog Integrated Circuit Topology Synthesis With Deep Reinforcement Learning.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad41.html#ZhaoZ22}, volume = 41, year = 2022 }