%0 Conference Paper %1 conf/eurodac/JiangLHL92 %A Jiang, Yi-Min %A Lee, Tsing-Fa %A Hwang, TingTing %A Lin, Yaun-Long %B EURO-DAC %D 1992 %E Musgrave, Gerald %I IEEE Computer Society Press %K dblp %P 118-123 %T Performance-driven interconnection optimization for microarchitecture synthesis. %U http://dblp.uni-trier.de/db/conf/eurodac/euro-dac1992.html#JiangLHL92 %@ 0-8186-2780-8

@inproceedings{conf/eurodac/JiangLHL92, added-at = {2017-05-24T00:00:00.000+0200}, author = {Jiang, Yi-Min and Lee, Tsing-Fa and Hwang, TingTing and Lin, Yaun-Long}, biburl = {https://www.bibsonomy.org/bibtex/2dd592cd0eaf90cb40421389072100238/dblp}, booktitle = {EURO-DAC}, crossref = {conf/eurodac/1992}, editor = {Musgrave, Gerald}, ee = {http://dl.acm.org/citation.cfm?id=161740}, interhash = {a3c17aa5ff088a2b2261707c89fe0e65}, intrahash = {dd592cd0eaf90cb40421389072100238}, isbn = {0-8186-2780-8}, keywords = {dblp}, pages = {118-123}, publisher = {IEEE Computer Society Press}, timestamp = {2019-10-17T22:25:49.000+0200}, title = {Performance-driven interconnection optimization for microarchitecture synthesis.}, url = {http://dblp.uni-trier.de/db/conf/eurodac/euro-dac1992.html#JiangLHL92}, year = 1992 }