%0 Conference Paper %1 conf/sies/DiemerTE12 %A Diemer, Jonas %A Thiele, Daniel %A Ernst, Rolf %B SIES %D 2012 %I IEEE %K dblp %P 1-10 %T Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching. %U http://dblp.uni-trier.de/db/conf/sies/sies2012.html#DiemerTE12 %@ 978-1-4673-2685-8

@inproceedings{conf/sies/DiemerTE12, added-at = {2017-05-17T00:00:00.000+0200}, author = {Diemer, Jonas and Thiele, Daniel and Ernst, Rolf}, biburl = {https://www.bibsonomy.org/bibtex/2717fb45da8bdcd1a4b398fd5f463efea/dblp}, booktitle = {SIES}, crossref = {conf/sies/2012}, ee = {https://doi.org/10.1109/SIES.2012.6356564}, interhash = {ad6e5f44cfe349062e656461135fd7a9}, intrahash = {717fb45da8bdcd1a4b398fd5f463efea}, isbn = {978-1-4673-2685-8}, keywords = {dblp}, pages = {1-10}, publisher = {IEEE}, timestamp = {2019-10-17T22:01:57.000+0200}, title = {Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching.}, url = {http://dblp.uni-trier.de/db/conf/sies/sies2012.html#DiemerTE12}, year = 2012 }