3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE.
@inproceedings{conf/isscc/OishiYSTKSKKMTK14,
added-at = {2021-10-14T00:00:00.000+0200},
author = {Oishi, Kazuaki and Yoshida, Eiji and Sakai, Yasufumi and Takauchi, Hideki and Kawano, Yoichi and Shirai, Noriaki and Kano, Hideki and Kudo, Masahiro and Murakami, Tomotoshi and Tamura, Tetsuro and Kawai, Seitaro and Yamaura, Shinji and Suto, Kazuo and Yamazaki, Hiroshi and Mori, Toshihiko},
biburl = {https://www.bibsonomy.org/bibtex/2c947dcf0956fe1a95842f8f39e0be586/dblp},
booktitle = {ISSCC},
crossref = {conf/isscc/2014},
ee = {https://doi.org/10.1109/ISSCC.2014.6757337},
interhash = {c857e2fe96c5b9a385d624b1e0e8c1d9},
intrahash = {c947dcf0956fe1a95842f8f39e0be586},
isbn = {978-1-4799-0918-6},
keywords = {dblp},
pages = {60-61},
publisher = {IEEE},
timestamp = {2024-04-09T20:42:55.000+0200},
title = {3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE.},
url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2014.html#OishiYSTKSKKMTK14},
year = 2014
}