%0 Conference Paper %1 conf/iscas/BurgHFR07 %A Burg, Andreas %A Haene, Simon %A Fichtner, Wolfgang %A Rupp, Markus %B ISCAS %D 2007 %I IEEE %K dblp %P 3530-3533 %T Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2007.html#BurgHFR07 %@ 1-4244-0921-7

@inproceedings{conf/iscas/BurgHFR07, added-at = {2024-05-07T00:00:00.000+0200}, author = {Burg, Andreas and Haene, Simon and Fichtner, Wolfgang and Rupp, Markus}, biburl = {https://www.bibsonomy.org/bibtex/29043de172df233e56025d221f9baae4d/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2007}, ee = {https://doi.org/10.1109/ISCAS.2007.378444}, interhash = {c9903d2ce58ac1162a69af5e04b6db4b}, intrahash = {9043de172df233e56025d221f9baae4d}, isbn = {1-4244-0921-7}, keywords = {dblp}, pages = {3530-3533}, publisher = {IEEE}, timestamp = {2024-05-13T09:45:05.000+0200}, title = {Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2007.html#BurgHFR07}, year = 2007 }