%0 Conference Paper %1 conf/isvlsi/ZeinaliMRM15 %A Zeinali, Behzad %A Madsen, Jens Kargaard %A Raghavan, Praveen %A Moradi, Farshad %B ISVLSI %D 2015 %I IEEE Computer Society %K dblp %P 74-79 %T Sub-Threshold SRAM Design in 14 Nm FinFET Technology with Improved Access Time and Leakage Power. %U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2015.html#ZeinaliMRM15 %@ 978-1-4799-8719-1

@inproceedings{conf/isvlsi/ZeinaliMRM15, added-at = {2023-03-24T00:00:00.000+0100}, author = {Zeinali, Behzad and Madsen, Jens Kargaard and Raghavan, Praveen and Moradi, Farshad}, biburl = {https://www.bibsonomy.org/bibtex/21661facae2e9f501781dd8c389cee9e0/dblp}, booktitle = {ISVLSI}, crossref = {conf/isvlsi/2015}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2015.73}, interhash = {d6917d8b07f2ac67d979f4cc3f897dc9}, intrahash = {1661facae2e9f501781dd8c389cee9e0}, isbn = {978-1-4799-8719-1}, keywords = {dblp}, pages = {74-79}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T11:08:41.000+0200}, title = {Sub-Threshold SRAM Design in 14 Nm FinFET Technology with Improved Access Time and Leakage Power.}, url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2015.html#ZeinaliMRM15}, year = 2015 }