%0 Conference Paper %1 conf/iscas/ImaiYTY04 %A Imai, Tetsuya %A Yoshikawa, Masaya %A Terai, Hidekazu %A Yamauchi, Hironori %B ISCAS (3) %D 2004 %I IEEE %K dblp %P 625-628 %T VLSI processor architecture for real-time GA processing and PE-VLSI design. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2004-3.html#ImaiYTY04 %@ 0-7803-8251-X

@inproceedings{conf/iscas/ImaiYTY04, added-at = {2016-05-20T00:00:00.000+0200}, author = {Imai, Tetsuya and Yoshikawa, Masaya and Terai, Hidekazu and Yamauchi, Hironori}, biburl = {https://www.bibsonomy.org/bibtex/20279b7a9700fc4ad04fcf02be9810f94/dblp}, booktitle = {ISCAS (3)}, crossref = {conf/iscas/2004}, ee = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=9255}, interhash = {d6b372ad17815bd45e891b2f76843881}, intrahash = {0279b7a9700fc4ad04fcf02be9810f94}, isbn = {0-7803-8251-X}, keywords = {dblp}, pages = {625-628}, publisher = {IEEE}, timestamp = {2016-05-21T12:25:01.000+0200}, title = {VLSI processor architecture for real-time GA processing and PE-VLSI design.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2004-3.html#ImaiYTY04}, year = 2004 }