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Disambiguation of "Terai, Hidekazu"

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VLSI processor architecture for real-time GA processing and PE-VLSI design.

, , , and . ISCAS (3), page 625-628. IEEE, (2004)

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Hatimali Terai

Naim Terai

Shakila Terai-Chun

Barbara Kanzow-Terai

 

Other publications of authors with the same name

Performance driven placement technique based on collaboration of software and hardware., and . Congress on Evolutionary Computation, page 1570-1575. IEEE, (2005)Car Navigation System Based on Hybrid Genetic Algorithm., and . CSIE (5), page 62-65. IEEE Computer Society, (2009)Asynchronous Parallel Genetic Algorithm for Congestion-Driven Placement Technique., and . SERA, page 130-136. IEEE Computer Society, (2005)Hybrid genetic algorithm engine for high-speed floorplanning., and . ECCTD, page 189-192. IEEE, (2005)Efficient placement algorithms optimizing delay for high-speed ECL masterslice LSIs., , , , , , and . DAC, page 404-410. IEEE Computer Society Press, (1986)Automatic Layout Procedures for Serial Routing Devices., , and . DAC, page 642-645. ACM, (1988)Immune Algorithm Processor., , and . CATA, page 13-18. ISCA, (2006)Co-evolutionary robotics using two kinds of neural networks., and . CAINE, page 330-334. ISCA, (2006)Automatic placement algorithms for high packing density V L S I., , , , , , , , and . DAC, page 175-181. ACM/IEEE, (1983)VLSI processor architecture for real-time GA processing and PE-VLSI design., , , and . ISCAS (3), page 625-628. IEEE, (2004)