%0 Journal Article %1 journals/tvlsi/HamzaogluYKZNBSD02 %A Hamzaoglu, Fatih %A Ye, Yibin %A Keshavarzi, Ali %A Zhang, Kevin %A Narendra, Siva G. %A Borkar, Shekhar %A Stan, Mircea R. %A De, Vivek %D 2002 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 2 %P 91-95 %T Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi10.html#HamzaogluYKZNBSD02 %V 10

@article{journals/tvlsi/HamzaogluYKZNBSD02, added-at = {2022-02-28T00:00:00.000+0100}, author = {Hamzaoglu, Fatih and Ye, Yibin and Keshavarzi, Ali and Zhang, Kevin and Narendra, Siva G. and Borkar, Shekhar and Stan, Mircea R. and De, Vivek}, biburl = {https://www.bibsonomy.org/bibtex/2f111b50883290a3525c4ab344ba71ab7/dblp}, ee = {https://doi.org/10.1109/92.994983}, interhash = {ddf6026716af43513029b373161b9599}, intrahash = {f111b50883290a3525c4ab344ba71ab7}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 2, pages = {91-95}, timestamp = {2024-04-08T14:32:20.000+0200}, title = {Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi10.html#HamzaogluYKZNBSD02}, volume = 10, year = 2002 }