%0 Journal Article %1 journals/vlsisp/LieverseWVD01 %A Lieverse, Paul %A van der Wolf, Pieter %A Vissers, Kees A. %A Deprettere, Ed F. %D 2001 %J VLSI Signal Processing %K dblp %N 3 %P 197-207 %T A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp29.html#LieverseWVD01 %V 29

@article{journals/vlsisp/LieverseWVD01, added-at = {2017-05-20T00:00:00.000+0200}, author = {Lieverse, Paul and van der Wolf, Pieter and Vissers, Kees A. and Deprettere, Ed F.}, biburl = {https://www.bibsonomy.org/bibtex/2424d3ef6370ea552b6a3654a02b4f606/dblp}, ee = {https://doi.org/10.1023/A:1012231429554}, interhash = {f4260637637d440986fea4261bbd2005}, intrahash = {424d3ef6370ea552b6a3654a02b4f606}, journal = {VLSI Signal Processing}, keywords = {dblp}, number = 3, pages = {197-207}, timestamp = {2017-05-23T23:11:40.000+0200}, title = {A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp29.html#LieverseWVD01}, volume = 29, year = 2001 }