( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
An Efficient Method to Identify Untestable Path Delay Faults.

, , , и . Asian Test Symposium, стр. 233-238. IEEE Computer Society, (2001)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Sudhakar Peddireddi

Padhmanand Sudhakar

Edamakanti Chandrakanth Reddy

Malgi Prasad Reddy

Martin Reddy

 

Другие публикации лиц с тем же именем

Correcting Unidirectional Errors with Nonpositive Hopfield Networks., , и . ICNN, стр. 2933-2938. IEEE, (1995)Layout Resynthesis by Applying Design-for-manufacturability Guidelines to Avoid Low-coverage Areas of a Cell-based Design., , , , и . ACM Trans. Design Autom. Electr. Syst., 24 (4): 42:1-42:19 (2019)On Removing Redundancies from Synchronous Sequential Circuits with Synchronizing Sequences., и . IEEE Trans. Computers, 45 (1): 20-32 (1996)On Totally Self-Checking Checkers for Separable Codes., и . IEEE Trans. Computers, 26 (8): 737-744 (1977)On the Design of Pseudoexhaustive Testable PLA's., и . IEEE Trans. Computers, 37 (4): 468-472 (1988)Masking of Unknown Output Values during Output Response Compression byUsing Comparison Units., , и . IEEE Trans. Computers, 53 (1): 83-88 (2004)A Fault-Tolerant Communication Architecture for Distributed Systems., и . IEEE Trans. Computers, 31 (9): 863-870 (1982)On Finding a Minimal Functional Description of a Finite-State Machine for Test Generation for Adjacent Machines., и . IEEE Trans. Computers, 49 (1): 88-94 (2000)A Storage-Based Built-In Test Pattern Generation Method for Scan Circuits Based on Partitioning and Reduction of a Precomputed Test Set., и . IEEE Trans. Computers, 51 (11): 1282-1293 (2002)A Cone-Based Genetic Optimization Procedure for Test Generation and Its Application to n-Detections in Combinational Circuits., и . IEEE Trans. Computers, 48 (10): 1145-1152 (1999)