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An accurate statistical yield model for CMOS current-steering D/A converters., , and . ISCAS, page 105-108. IEEE, (2000)An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection., , , , and . DATE, page 81-86. EDA Consortium, San Jose, CA, USA, (2007)A Novel Bootstrapped Switch Design, Applied in a 400 MHz Clocked ΔΣ ADC., and . ICECS, page 1156-1159. IEEE, (2006)A high-speed fully integrated optical receiver in standard 130nm CMOS., and . ICECS, page 806-809. IEEE, (2008)Modelling, design and characterization of Schottky diodes in 28nm bulk CMOS for 850/1310/1550nm fully integrated optical receivers., , and . ESSDERC, page 224-227. IEEE, (2017)22.5 A 4×20Gb/s WDM ring-based hybrid CMOS silicon photonics transceiver., , , , , , , , , and 6 other author(s). ISSCC, page 1-3. IEEE, (2015)The folding dickson converter: A step towards fully integrated wide input range capacitive DC-DC converters., and . ESSCIRC, page 267-270. IEEE, (2014)Dual-output capacitive DC-DC converter with power distribution regulator in 90 nm CMOS., , , and . ESSCIRC, page 169-172. IEEE, (2012)DC-DC converters: From discrete towards fully integrated CMOS., , , , and . ESSCIRC, page 42-49. IEEE, (2011)A colpitts LC VCO with Miller-capacitance gm enhancing and phase noise reduction techniques., , and . ESSCIRC, page 491-494. IEEE, (2011)