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A 25MHz all-CMOS reference clock generator for XO-replacement in serial wire interfaces., , , , , , , and . ISCAS, page 2837-2840. IEEE, (2008)Power-aware global signaling strategies., , , , , and . ISCAS (1), page 604-607. IEEE, (2005)Study and simulation of CMOS LC oscillator phase noise and jitter., , and . ISCAS (1), page 665-668. IEEE, (2003)A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference., , , , , , and . DAC, page 520-525. ACM, (2003)A dual-VDD boosted pulsed bus technique for low power and low leakage operation., , , , and . ISLPED, page 73-78. ACM, (2006)Approaches to run-time and standby mode leakage reduction in global buses., , , , , and . ISLPED, page 188-193. ACM, (2004)Clock tree synthesis with data-path sensitivity matching., , and . ASP-DAC, page 498-503. IEEE, (2008)Top-down and bottom-up approaches to stable clock synthesis., , and . ICECS, page 575-578. IEEE, (2003)Reducing parasitic BJT effects in partially depleted SOI digital logic circuits., , and . Microelectron. J., 39 (2): 275-285 (2008)Parametric Yield Analysis and Optimization in Leakage Dominated Technologies., , , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (6): 613-623 (2007)