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Disambiguation of "Martins, Rui Paulo"

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Sub-threshold standard cell library design for ultra-low power biomedical applications.

, , , , , and . EMBC, page 1454-1457. IEEE, (2013)

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Paulo Martins Engel

Paulo Ney Aguiar Martins

Milan Paulovic

Manuel António Paulo

Hartwig Paulo

 

Other publications of authors with the same name

A 0.4 V 6.4 μW 3.3 MHz CMOS Bootstrapped Relaxation Oscillator with ±0.71% Frequency Deviation over -30 to 100 °C for Wearable and Sensing Applications., , and . ISCAS, page 1-5. IEEE, (2018)Experimental 1-V flexible-IF CMOS analoguebaseband chain for IEEE 802.11a/b/g WLAN receivers., , and . IET Circuits Devices Syst., 1 (6): 415-426 (2007)Cost-Effective Compensation Design for Output Customization and Efficiency Optimization in Series/Series-Parallel Inductive Power Transfer Converter., , , , and . IEEE Trans. Ind. Electron., 67 (12): 10356-10365 (2020)A 0.22-to-2.4V-input fine-grained fully integrated rational buck-boost SC DC-DC converter using algorithmic voltage-feed-in (AVFI) topology achieving 84.1% peak efficiency at 13.2mW/mm2., , , and . ISSCC, page 422-424. IEEE, (2018)A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur., , , , and . ISSCC, page 270-272. IEEE, (2019)11.5 A 2-Phase Soft-Charging Hybrid Boost Converter with Doubled-Switching Pulse Width and Shared Bootstrap Capacitor Achieving 93.5% Efficiency at a Conversion Ratio of 4.5., , and . ISSCC, page 198-200. IEEE, (2020)A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC With Gain and Offset Calibrations., , , , , , and . IEEE J. Solid State Circuits, 57 (3): 745-756 (2022)A 52.5-dB 2× Time-Interleaved 2.8-GS/s SAR ADC With 5-bit/Cycle Time-Domain Quantization and a Compact Signal DAC., , , , and . IEEE J. Solid State Circuits, 58 (12): 3586-3597 (December 2023)A Single-Stage Dual-Output Regulating Rectifier With Hysteretic Current-Wave Modulation., , , and . IEEE J. Solid State Circuits, 56 (9): 2770-2780 (2021)A 0.35-V 5, 200-μm2 2.1-MHz Temperature-Resilient Relaxation Oscillator With 667 fJ/Cycle Energy Efficiency Using an Asymmetric Swing-Boosted RC Network and a Dual-Path Comparator., , and . IEEE J. Solid State Circuits, 56 (9): 2701-2710 (2021)