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Mixed-clock issue queue design for energy aware, high-performance cores.

, , and . ASP-DAC, page 380-383. IEEE Computer Society, (2004)

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Mixed-clock issue queue design for energy aware, high-performance cores., , and . ASP-DAC, page 380-383. IEEE Computer Society, (2004)Computer and Redundancy Solution for the Full Self-Driving Computer., , , and . Hot Chips Symposium, page 1-22. IEEE, (2019)The Microarchitecture of DOJO, Tesla's Exa-Scale Computer., , , , , , , , , and 8 other author(s). IEEE Micro, 43 (3): 31-39 (May 2023)Variability and energy awareness: a microarchitecture-level perspective., and . DAC, page 11-16. ACM, (2005)Execution cache-based microarchitecture for power-efficient superscalar processors., and . IEEE Trans. Very Large Scale Integr. Syst., 13 (1): 14-26 (2005)Impact of technology scaling on energy aware execution cache-based microarchitectures., and . ISLPED, page 50-53. ACM, (2004)Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines., and . ISCA, page 310-321. IEEE Computer Society, (2005)A critical analysis of application-adaptive multiple clock processors., and . ISLPED, page 278-281. ACM, (2003)Power reduction through work reuse., and . ISLPED, page 340-345. ACM, (2001)DOJO: The Microarchitecture of Tesla's Exa-Scale Computer., , and . HCS, page 1-28. IEEE, (2022)