Author of the publication

Design of Compact and High speed, Totally Self Checking CMOS Checkers for m-out-of-n Codes.

, , and . DFT, page 128-136. IEEE Computer Society, (1997)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Kavousianos, Xrysovalantis
add a person with the name Kavousianos, Xrysovalantis
 

Other publications of authors with the same name

K3 TAM Optimization for Testing 3D-SoCs using Non-Regular Time-Division-Multiplexing., , and . ETS, page 1-6. IEEE, (2019)A highly regular multi-phase reseeding technique for scan-based BIST., , and . ACM Great Lakes Symposium on VLSI, page 295-298. ACM, (2003)High-Quality Statistical Test Compression With Narrow ATE Interface., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (9): 1369-1382 (2013)A new built-in TPG method for circuits with random patternresistant faults., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (7): 859-866 (2002)Low Power Built-In Self-Test Schemes for Array and Booth Multipliers., , , , and . VLSI Design, 12 (3): 431-448 (2001)Static Power Reduction Using Variation-Tolerant and Reconfigurable Multi-Mode Power Switches., , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (1): 13-26 (2014)Generation of compact test sets with high defect coverage., and . DATE, page 1130-1135. IEEE, (2009)Defect Coverage-Driven Window-Based Test Compression., , , and . Asian Test Symposium, page 141-146. IEEE Computer Society, (2010)Test response compaction by an accumulator behaving as a multiple input non-linear feedback shift register., , and . ITC, page 804-811. IEEE Computer Society, (2000)A New Reseeding Technique for LFSR-Based Test Pattern Generation., , , and . IOLTW, page 80-86. IEEE Computer Society, (2001)