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Disambiguation of "Khan, Mohd. Tasleem"

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Low-Area and Low-Power VLSI Architectures for Long Short-Term Memory Networks.

, , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 13 (4): 1000-1014 (December 2023)

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Mohd Tajudin Mohd Ali

Mohd Azmir Mohd Azhari

Mohd Zamri Che Wanik

Adel Abdelrazek Abdelazim Mohdali

NULL Mohd Azmir Mohd Azhari

 

Other publications of authors with the same name

Improved convergent distributed arithmetic based low complexity pipelined least-mean-square filter., , and . IET Circuits Devices Syst., 12 (6): 792-801 (2018)Energy efficient VLSI architecture of real-valued serial pipelined FFT., , , and . IET Comput. Digit. Tech., 13 (6): 461-469 (2019)High-Throughput and Improved-Convergent Design of Pipelined Adaptive DFE for 5G Communication., and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (2): 652-656 (2021)High Performance Multiplierless Serial Pipelined VLSI Architecture for Real-Valued FFT., , , and . NCC, page 1-6. IEEE, (2019)Low-Complexity Continuous-Flow Memory-Based FFT Architectures for Real-Valued Signals., , and . VLSID, page 46-51. IEEE, (2019)Optimal Complexity Architectures for Pipelined Distributed Arithmetic-Based LMS Adaptive Filter., and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (2): 630-642 (2019)Area and Power Efficient VLSI Architecture of Distributed Arithmetic Based LMS Adaptive Filter., and . VLSID, page 283-288. IEEE Computer Society, (2018)Analysis and Implementation of Block Least Mean Square Adaptive Filter using Offset Binary Coding., and . ISCAS, page 1-5. IEEE, (2018)A Novel Time-Shared and LUT-Less Pipelined Architecture for LMS Adaptive Filter., , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (1): 188-197 (2020)Analyzing Step-Size Approximation for Fixed-Point Implementation of LMS and BLMS Algorithms., and . NorCAS, page 1-5. IEEE, (2023)