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8.5 A Scalable Adaptive ADC/DSP-Based 1.25-to-56Gbps/112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm.

, , , , , , , , , , , , , , , , , , , and . ISSCC, page 134-136. IEEE, (2021)

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