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24.8 An analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area.

J. Um, E. Song, Y. Kim, S. Cho, M. Chae, J. Song, B. Kim, S. Lee, J. Bang, Y. Kim, K. Cho, B. Kim, J. Sim, and H. Park. ISSCC, page 426-427. IEEE, (2014)

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Jae-Han Sim

Jae-Yoon Kim

Unyong Sim

Sim Hägele

Gavin Sim

Other publications of authors with the same name

A Digitally Controlled Op-Amp with Level-Crossing-Based Approximation and its Application to a 10-bit Pipeline ADC.D. Jee, Y. Suh, H. Park, and J. Sim. Journal of Circuits, Systems, and Computers, 25 (12): 1650155:1-1650155:16 (2016)45pW ESD clamp circuit for ultra-low power applications.Y. Chen, Y. Lee, J. Sim, M. Alioto, D. Blaauw, and D. Sylvester. CICC, page 1-4. IEEE, (2013)5.5 A quadrature relaxation oscillator with a process-induced frequency-error compensation loop.J. Koo, K. Moon, B. Kim, H. Park, and J. Sim. ISSCC, page 94-95. IEEE, (2017)An 8.8-GS/s 6-bit CMOS Time-Interleaved Flash Analog-to-Digital Converter with Multi-Phase Clock Generator.Y. Jang, J. Bae, S. Park, J. Sim, and H. Park. IEICE Trans. Electron., 90-C (6): 1156-1164 (2007)A 490-pW SAR Temperature Sensor With a Leakage-Based Bandgap-Vth Reference.B. Park, Y. Ji, and J. Sim. IEEE Trans. Circuits Syst. II Express Briefs, 67-II (9): 1549-1553 (2020)A Transmitter to Compensate for Crosstalk-Induced Jitter by Subtracting a Rectangular Crosstalk Waveform From Data Signal During the Data Transition Time in Coupled Microstrip Lines.H. Jung, I. Yi, S. Lee, J. Sim, and H. Park. IEEE J. Solid State Circuits, 47 (9): 2068-2079 (2012)A 1.8-V 128-Mb mobile DRAM with double boosting pump, hybrid current sense amplifier, and dual-referenced adjustment scheme for temperature sensor.J. Sim, H. Yoon, K. Chun, H. Lee, S. Hong, K. Lee, J. Yoo, D. Seo, and S. Cho. IEEE J. Solid State Circuits, 38 (4): 631-640 (2003)Analysis and prevention of DRAM latch-up during power-on.Y. Kim, J. Sim, H. Park, J. Doh, K. Park, H. Chung, J. Oh, C. Oh, and S. Ahn. IEEE J. Solid State Circuits, 32 (1): 79-85 (1997)Multipurpose Deep-Learning Accelerator for Arbitrary Quantization With Reduction of Storage, Logic, and Latency Waste.S. Moon, H. Mun, H. Son, and J. Sim. IEEE J. Solid State Circuits, 59 (1): 143-156 (January 2024)A CMOS transceiver for DRAM bus system with a demultiplexed equalization scheme.J. Sim, J. Nam, Y. Sohn, H. Park, C. Kim, and S. Cho. IEEE J. Solid State Circuits, 37 (2): 245-250 (2002)

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Disambiguation of "Sim, Jae-Yoon"