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Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS.

A. Yan, L. Wang, J. Cui, Z. Huang, T. Ni, P. Girard, and X. Wen. IEEE Trans. Very Large Scale Integr. Syst., 32 (1): 116-127 (January 2024)

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Zhengfeng Zhang

Zhengfeng Qian

Feiqing Huang

Haishi Huang

Zhida Huang

Other publications of authors with the same name

A Novel Triple-Node-Upset-Tolerant CMOS Latch Design using Single-Node-Upset-Resilient Cells.Z. Song, A. Yan, J. Cui, Z. Chen, X. Li, X. Wen, C. Lai, Z. Huang, and H. Liang. ITC-Asia, page 139-144. IEEE, (2019)Design of Wireless Network on Chip with Priority-Based MAC.Y. Ouyang, Y. Zhao, K. Xing, Z. Huang, H. Liang, and J. Li. Journal of Circuits, Systems, and Computers, 28 (8): 1950124:1-1950124:18 (2019)Single event double-upset fully immune and transient pulse filterable latch design for nanoscale CMOS.A. Yan, Z. Huang, X. Fang, Y. Ouyang, and H. Deng. Microelectron. J., (2017)Method of generating strategic guidance information for driving evacuation flows to approach safety-based system optimal dynamic flows: Case study of a large stadium.G. Ren, Z. Huang, L. Lu, J. Hua, and J. Wang. J. Systems Science & Complexity, 28 (3): 606-622 (2015)A high performance SEU-tolerant latch for nanoscale CMOS technology.Z. Huang. DATE, page 1-5. European Design and Automation Association, (2014)CC-RTSV: Cross-Cellular Based Redundant TSV Design for 3D ICs.T. Ni, Y. Shu, H. Chang, L. Lu, G. Dai, S. Zhu, C. Qu, and Z. Huang. J. Circuits Syst. Comput., 29 (11): 2050144:1-2050144:19 (2020)Cross-Layer Dual Modular Redundancy Hardened Scheme of Flip-Flop Design Based on Sense-Amplifier.Z. Huang, Z. Su, T. Ni, Q. Xu, H. Qi, Y. Lu, M. Eric, and H. Xu. J. Circuits Syst. Comput., 30 (5): 2120003:1-2120003:16 (2021)Novel Critical Gate-Based Circuit Path-Level NBTI-Aware Aging Circuit Degradation Prediction.H. Xu, R. Zhu, X. Sun, X. Fang, P. Qi, H. Liang, and Z. Huang. J. Circuits Syst. Comput., 32 (10): 2350175:1-2350175:19 (August 2023)Design Guidelines and Feedback Structure of Ring Oscillator PUF for Performance Improvement.Z. Huang, J. Bian, Y. Lin, H. Liang, and T. Ni. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (1): 71-84 (January 2024)RMC_NoC: A Reliable On-Chip Network Architecture With Reconfigurable Multifunctional Channel.D. Xu, Y. Ouyang, W. Zhou, Z. Huang, H. Liang, and X. Wen. IEEE Trans. Very Large Scale Integr. Syst., 31 (12): 2061-2074 (December 2023)

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Disambiguation of "Huang, Zhengfeng"

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Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS.

Please choose a person to relate this publication to

Zhengfeng Zhang

Zhengfeng Qian

Feiqing Huang

Haishi Huang

Zhida Huang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Huang, Zhengfeng"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS.

Please choose a person to relate this publication to

Zhengfeng Zhang

Zhengfeng Qian

Feiqing Huang

Haishi Huang

Zhida Huang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS.