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Disambiguation of "Bhattacharya, Sambuddha"

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Automatic design rule correction in presence of multiple grids and track patterns.

, , , and . DAC, page 26:1-26:6. ACM, (2013)

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Subhamoy Bhattacharya

Chhaya Bhattacharya

Nupur Bhattacharya

Indrajit Bhattacharya

Asitesh Bhattacharya

 

Other publications of authors with the same name

Template-driven parasitic-aware optimization of analog integrated circuit layouts., , and . DAC, page 644-647. ACM, (2005)IPRAIL - intellectual property reuse-based analog IC layout automation., , , and . Integr., 36 (4): 237-262 (2003)CrtSmile: a CAD tool for CMOS RF transistor substrate modeling incorporating layout effects., , , , , and . ASP-DAC, page 163-168. IEEE Computer Society, (2004)Multiple specifications radio-frequency integrated circuit design with automatic template-driven layout retargeting., , , and . ASP-DAC, page 394-399. IEEE Computer Society, (2004)2SAT Based Infeasibility Resolution during Design Rule Correction on Layouts with Multiple Grids., , , and . VLSID, page 186-191. IEEE Computer Society, (2015)On Efficient and Robust Constraint Generation for Practical Layout Legalization., , , , and . ISQED, page 379-384. IEEE Computer Society, (2008)Concurrent logic and interconnect delay estimation of MOS circuits by mixed algebraic and Boolean symbolic analysis., and . ISCAS (4), page 660-663. IEEE, (2003)Correct-by-construction layout-centric retargeting of large analog designs., , , and . DAC, page 139-144. ACM, (2004)Multilevel symmetry-constraint generation for retargeting large analog layouts., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (6): 945-960 (2006)Hierarchical extraction and verification of symmetry constraints for analog layout automation., , , and . ASP-DAC, page 400-405. IEEE Computer Society, (2004)