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Segmentation based design of serial parallel multipliers., , , , and . ISCAS, IEEE, (2006)A high-speed radix-4 multiplexer-based array multiplier., , and . ACM Great Lakes Symposium on VLSI, page 115-118. ACM, (2008)A cache based stack folding technique for high performance Java processors., , and . JTRES, page 48-57. ACM, (2006)Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs., , , and . ACM Trans. Design Autom. Electr. Syst., 18 (1): 11:1-11:35 (2012)A design methodology for high-performance and low-leakage fixed-point transpose FIR filters., , , and . ICECS, page 415-418. IEEE, (2009)On the Hardware Implementation of the 3GPP Confidentiality and Integrity Algorithms., , , and . ISC, volume 2200 of Lecture Notes in Computer Science, page 248-265. Springer, (2001)A predecoding technique for ILP exploitation in Java processors., , and . J. Syst. Archit., 54 (7): 707-728 (2008)An instruction set extension for java bytecodes translation acceleration., , and . ICSAMOS, page 116-123. IEEE, (2008)Low leakage radiation tolerant CAM/TCAM cell., , and . IOLTS, page 206-211. IEEE, (2015)FPGA-based Design of a Large Moduli Multiplier for Public Key Cryptographic Systems., , , and . ICCD, page 314-319. IEEE, (2006)