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Improving Latency Tolerance of Multithreading through Decoupling., and . IEEE Trans. Computers, 50 (10): 1084-1094 (2001)Eliminating Cache Conflict Misses through XOR-Based Placement Functions., , , and . International Conference on Supercomputing, page 76-83. ACM, (1997)Confidence Estimation for Branch Prediction Reversal., , , and . HiPC, volume 2228 of Lecture Notes in Computer Science, page 214-223. Springer, (2001)Vectorizing for Wider Vector Units in a HW/SW Co-designed Environment., , and . HPCC/EUC, page 518-525. IEEE, (2013)Cache organizations for clustered microarchitectures., , and . WMPI, page 46-55. ACM, (2004)Design space exploration for multicore architectures: a power/performance/thermal view., , and . ICS, page 177-186. ACM, (2006)Assisting Static Compiler Vectorization with a Speculative Dynamic Vectorizer in an HW/SW Codesigned Environment., , and . ACM Trans. Comput. Syst., 33 (4): 12:1-12:33 (2016)AGAMOS: A Graph-Based Approach to Modulo Scheduling for Clustered Microarchitectures., , , , and . IEEE Trans. Computers, 58 (6): 770-783 (2009)Hardware support for early register release., , , and . IJHPCN, 3 (2/3): 83-94 (2005)Reducing Branch Delay to Zero in Pipelined Processors., and . IEEE Trans. Computers, 42 (3): 363-371 (1993)