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Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power., , , , , , , and . IEEE PACT, page 141-152. IEEE Computer Society, (2002)Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor., , , , , and . IEEE Micro, 23 (6): 62-68 (2003)Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling., , , , , and . HPCA, page 29-42. IEEE Computer Society, (2002)Dynamic frequency and voltage control for a multiple clock domain microarchitecture., , , , , and . MICRO, page 356-367. ACM/IEEE Computer Society, (2002)Hiding Synchronization Delays in a GALS Processor Microarchitecture., , , , , and . ASYNC, page 159-169. IEEE Computer Society, (2004)Dynamically Tuning Processor Resources with Adaptive Processing., , , , , , , , , and 4 other author(s). Computer, 36 (12): 49-58 (2003)Dynamically Trading Frequency for Complexity in a GALS Microprocessor., , , , and . MICRO, page 157-168. IEEE Computer Society, (2004)Profile-Based Dynamic Voltage and Frequency Scaling for a Multiple Clock Domain Microprocessor., , , , and . ISCA, page 14-25. IEEE Computer Society, (2003)Evolutionary Approach To Real-Time Analysis. Genetic Programming 1998: Proceedings of the Third Annual Conference, page 592. University of Wisconsin, Madison, Wisconsin, USA, Morgan Kaufmann, (22-25 July 1998)