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Disambiguation of "Maurine, Philippe"

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An evaluation of an AES implementation protected against EM analysis.

, , , , and . ACM Great Lakes Symposium on VLSI, page 317-318. ACM, (2013)

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Philippe Destouches

Philippe Staib

Philippe Kersting

Philippe Dreuw

Philippe Zysset

 

Other publications of authors with the same name

Electromagnetic Fault Injection : How Faults Occur., , and . FDTC, page 9-16. IEEE, (2019)Practical Analysis of RSA Countermeasures Against Side-Channel Electromagnetic Attacks., , , and . CARDIS, volume 8419 of Lecture Notes in Computer Science, page 200-215. Springer, (2013)Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography., , , , and . VLSI-SoC, volume 360 of IFIP Advances in Information and Communication Technology, page 135-155. Springer, (2009)Interest of MIA in frequency domain?, , , and . CS2@HiPEAC, page 35-38. ACM, (2015)CMOS Gate Sizing under Delay Constraint., , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 60-69. Springer, (2003)Performance Metric Based Optimization Protocol., , , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 100-109. Springer, (2004)Gate Sizing for Low Power Design., , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 301-312. Kluwer, (2001)Security evaluation of dual rail logic against DPA attacks., , , and . VLSI-SoC, page 181-186. IEEE, (2006)Statistical timing characterization., , , and . ISSoC, page 1-4. IEEE, (2012)Circuit sizing method under delay constraint., , , and . ISCAS, IEEE, (2006)