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Design of Sub-10-Picoseconds On-Chip Time Measurement Circuit.

, , and . DATE, page 804-809. IEEE Computer Society, (2004)

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Correct interactive transformational synthesis of DSP hardware., , and . EURO-DAC, page 16-21. EEE Computer Society, (1991)A recursive design methodology for VLSI: Theory and example., , , and . Integr., 2 (3): 213-225 (1984)SIMSTRICT: A Behavioural Simulator for Use with the STRICT Hardware Description Language (Short Note)., and . Comput. J., 35 (6): 651-654 (1992)Modelling and Verification of Timing Conditions with the Boyer Moore Prover., and . TPCD, volume A-10 of IFIP Transactions, page 111-127. North-Holland, (1992)An autolayout system for a hierarchical i.c. design environment., and . Integr., 1 (2-3): 107-119 (1983)A self-taught computer engineering course., , , , and . ACSE, volume 1 of ACM International Conference Proceeding Series, page 7-12. ACM, (1996)On-Chip Structures for Timing Measurements and Test., , , , and . ASYNC, page 190-197. IEEE Computer Society, (2002)Low Latency Synchronization Through Speculation., and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 278-288. Springer, (2004)A Design Language for Asynchronous Logic., , and . Comput. J., 21 (4): 347-354 (1978)An Experimental Paging Unit., , and . Comput. J., 14 (1): 55-60 (1971)