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Disambiguation of "Panic, Goran"

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Power gating in wireless sensor networks.

, , and . ISWPC, page 499-503. IEEE, (2008)

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Arijana Panic

Leo Panic

Andrej Panic

Sivahari Prasad Gorantla

Iwan Goranow

 

Other publications of authors with the same name

Implementation of a Multi-Core Data Link Layer Processor for THz Communication., , , , , and . VTC Spring, page 1-5. IEEE, (2018)Ultra high speed 802.11n LDPC decoder with seven-stage pipeline in 28 nm CMOS., , , , , , , , and . VTC Spring, page 1-5. IEEE, (2022)Data Link Layer Processor for 100 Gbps Terahertz Wireless Communications in 28 nm CMOS Technology., , , , , , and . IEEE Access, (2019)High-Speed SC Decoder for Polar Codes achieving 1.7 Tb/s in 28 nm CMOS., , , , , , and . VLSI-SoC, page 1-6. IEEE, (2022)High-Throughput Multi-Frame Decoding of QC-LDPC Codes With Modified Rejection-Based Minimum Finding., , , and . IEEE Access, (2022)Ultra High-Speed BP Decoder for Polar Codes achieving 1.4 Tbps in 28 nm CMOS., , , , , , , and . EuCNC, page 434-439. IEEE, (2022)TNODE: A low power sensor node processor for secure wireless networks., , , , and . ISSoC, page 1-4. IEEE, (2013)Möglichkeiten der Nutzung von RRAM in Low-Power Microcontrollern., , and . GI-Jahrestagung, volume P-246 of LNI, page 1475-1486. GI, (2015)Low Power Design Techniques.. GI-Jahrestagung, volume P-246 of LNI, page 1379. GI, (2015)Classification of Space Particle Events using Supervised Machine Learning Algorithms., , , , , , and . DSAA, page 1-10. IEEE, (2021)