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Design of the IBM z14 microprocessor., , , , , , , , , and 3 other author(s). IBM J. Res. Dev., 62 (2/3): 8:1-8:11 (2018)The zEnterprise 196 System and Microprocessor., , , , , , and . IEEE Micro, 31 (2): 26-40 (2011)The S/390 G5/G6 binodal cache., , , , , , , and . IBM J. Res. Dev., 43 (5): 661-670 (1999)Shared-cache clusters in a system with a fully shared memory., , , , and . IBM J. Res. Dev., 41 (4&5): 429-448 (1997)IBM System z10 processor cache subsystem microarchitecture., , and . IBM J. Res. Dev., 53 (1): 2 (2009)5.5GHz system z microprocessor and multi-chip module., , , , , , , , , and 13 other author(s). ISSCC, page 46-47. IEEE, (2013)Processor subsystem interconnect architecture for a large symmetric multiprocessing system., , , , , , , , and . IBM J. Res. Dev., 48 (3-4): 323-338 (2004)The IBM z13 processor cache subsystem., , , , , , , , and . IBM J. Res. Dev., (2015)IBM zEnterprise 196 microprocessor and cache subsystem., , , , , , , and . IBM J. Res. Dev., 56 (1): 1 (2012)A 5.2GHz microprocessor chip for the IBM zEnterprise™ system., , , , , , , , , and 17 other author(s). ISSCC, page 70-72. IEEE, (2011)