Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Instruction-aware Learning-based Timing Error Models through Significance-driven Approximations., , , , and . ICCD, page 455-462. IEEE, (2022)Dynamic memory access monitoring based on tagged memory., and . PACT, page 409. IEEE Computer Society, (2013)Low-Power Variation-Aware Cores based on Dynamic Data-Dependent Bitwidth Truncation., , and . DATE, page 698-703. IEEE, (2019)DStress: Automatic Synthesis of DRAM Reliability Stress Viruses using Genetic Algorithms., , and . MICRO, page 298-312. IEEE, (2020)Resource-Efficient Convolutional Networks: A Survey on Model-, Arithmetic-, and Implementation-Level Techniques., , , , , , , , and . ACM Comput. Surv., 55 (13s): 276:1-276:36 (2023)Leveraging Transprecision Computing for Machine Vision Applications at the Edge., , , , and . SiPS, page 205-210. IEEE, (2021)Characterization of HPC workloads on an ARMv8 based server under relaxed DRAM refresh and thermal stress., , , and . SAMOS, page 230-235. ACM, (2018)Measuring and Exploiting Guardbands of Server-Grade ARMv8 CPU Cores and DRAMs., , , , , , , , , and 2 other author(s). DSN Workshops, page 6-9. IEEE Computer Society, (2018)Revealing DRAM Operating GuardBands Through Workload-Aware Error Predictive Modeling., , , , and . IEEE Trans. Computers, 70 (11): 1976-1987 (2021)Variation-Aware Pipelined Cores through Path Shaping and Dynamic Cycle Adjustment: Case Study on a Floating-Point Unit., , , and . ISLPED, page 52:1-52:6. ACM, (2018)