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Lambda Set Selection in Roth-Karp Decomposition for LUT-Based FPGA Technology Mapping.

W. Shen, J. Huang, and S. Chao. DAC, page 65-69. ACM Press, (1995)

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Shaul Dar

Cheng-Dar Yue

Altaf Ahmad Dar

Maureen Dar Iang

Haishi Huang

Other publications of authors with the same name

A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication.C. Chen, G. Lee, J. Huang, and J. Jou. ASP-DAC, page 600-605. IEEE, (2006)Simultaneous data transfer routing and scheduling for interconnect minimization in multicycle communication architecture.Y. Hong, Y. Huang, and J. Huang. ASP-DAC, page 19-24. IEEE, (2009)A multicycle communication architecture and synthesis flow for Global interconnect Resource Sharing.W. Huang, Y. Hong, J. Huang, and Y. Huang. ASP-DAC, page 16-21. IEEE, (2008)Sample preparation for many-reactant bioassay on DMFBs using common dilution operation sharing.C. Liu, H. Chang, T. Liang, and J. Huang. ICCAD, page 615-621. IEEE, (2013)ALTO: an iterative area/performance tradeoff algorithm for LUT-based FPGA technology mapping.J. Huang, J. Jou, and W. Shen. IEEE Trans. Very Large Scale Integr. Syst., 8 (4): 392-400 (2000)Automatic Verification Stimulus Generation for Interface Protocols Modeled With Non-Deterministic Extended FSM.C. Shih, J. Huang, and J. Jou. IEEE Trans. Very Large Scale Integr. Syst., 17 (5): 723-727 (2009)Performance-Driven Architectural Synthesis for Distributed Register-File Microarchitecture with Inter-Island Delay.J. Huang, C. Chen, W. Hsu, Y. Lin, and J. Jou. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 95-A (2): 559-566 (2012)Multi-objective sample preparation algorithm for microfluidic biochips supporting various mixing models.Y. Lei, T. Lin, and J. Huang. SoCC, page 96-101. IEEE, (2016)Expandable MDC-based FFT architecture and its generator for high-performance applications.B. Lin, Y. Wang, J. Huang, and J. Jou. SoCC, page 188-192. IEEE, (2010)Defect-aware synthesis for reconfigurable single-electron transistor arrays.J. Huang, Y. Chen, and J. Lu. VLSI-SoC, page 1-6. IEEE, (2017)

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Disambiguation of "Huang, Juinn-Dar"

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Lambda Set Selection in Roth-Karp Decomposition for LUT-Based FPGA Technology Mapping.

Please choose a person to relate this publication to

Shaul Dar

Cheng-Dar Yue

Altaf Ahmad Dar

Maureen Dar Iang

Haishi Huang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Huang, Juinn-Dar"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Lambda Set Selection in Roth-Karp Decomposition for LUT-Based FPGA Technology Mapping.

Please choose a person to relate this publication to

Shaul Dar

Cheng-Dar Yue

Altaf Ahmad Dar

Maureen Dar Iang

Haishi Huang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Lambda Set Selection in Roth-Karp Decomposition for LUT-Based FPGA Technology Mapping.