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Analyzing On-Chip Communication in a MPSoC Environment., , , , and . DATE, page 752-757. IEEE Computer Society, (2004)Energy-optimal synchronization primitives for single-chip multi-processors., , , and . ACM Great Lakes Symposium on VLSI, page 141-144. ACM, (2009)Reducing the Spike Rate in Deep Spiking Neural Networks., , and . ICONS, page 8:1-8:8. ACM, (2022)ISS-centric modular HW/SW co-simulation., , , and . ACM Great Lakes Symposium on VLSI, page 31-36. ACM, (2006)Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation., , , , , and . DATE, page 798-803. IEEE Computer Society, (2005)Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor., , and . ICCD, page 393-396. IEEE Computer Society, (2004)Synchronization-driven dynamic speed scaling for MPSoCs., , and . ISLPED, page 346-349. ACM, (2006)A cosimulation methodology for HW/SW validation and performance estimation., , , and . ACM Trans. Design Autom. Electr. Syst., 14 (2): 23:1-23:32 (2009)Ferroelectric based FETs and synaptic devices for highly energy efficient computational technologies., , , , , and . CoRR, (2021)Cache coherence tradeoffs in shared-memory MPSoCs, , and . ACM Trans. Embed. Comput. Syst., 5 (2): 383--407 (maio 2006)