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A Parallel ASIC Architecture for Efficient Fractal Image Coding.

, , and . VLSI Signal Processing, 19 (2): 97-113 (1998)

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Being Stingy with Multipliers., and . IEEE Trans. Computers, 39 (6): 809-818 (1990)Fully Digit On-Line Networks., and . IEEE Trans. Computers, 32 (4): 402-406 (1983)Techniques to Reduce the Inherent Limitations of Fully Digit On-Line Arithmetic.. IEEE Trans. Computers, 32 (4): 406-411 (1983)Multi-Level Logic Synthesis Using Communication Complexity., , and . DAC, page 215-220. ACM Press, (1989)FPGA-based synthesis of FSMs through decomposition., , and . Great Lakes Symposium on VLSI, page 97-100. IEEE, (1994)Compound algorithms for digit online arithmetic.. IEEE Symposium on Computer Arithmetic, page 64-71. IEEE Computer Society, (1981)PERFLEX: a performance driven module generator., , and . EURO-DAC, page 154-159. IEEE Computer Society Press, (1992)Power-delay characteristics of CMOS adders., , and . IEEE Trans. Very Large Scale Integr. Syst., 2 (3): 377-381 (1994)A fast algorithm for minimizing the Elmore delay to identified critical sinks., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (7): 753-759 (1997)Distortion processing in image matching problems., , and . ICASSP, page 2181-2184. IEEE, (1990)