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A low-power 28 Gb/s CDR using artificial lc transmission line technique in 65 nm CMOS.

, , , , , , , and . MWSCAS, page 85-88. IEEE, (2014)

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High-Efficiency E-Band Power Amplifiers and Transmitter Using Gate Capacitance Linearization in a 65-nm CMOS Process., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (3): 234-238 (2017)A low-power 28 Gb/s CDR using artificial lc transmission line technique in 65 nm CMOS., , , , , , , and . MWSCAS, page 85-88. IEEE, (2014)A 1-16 Gb/s All-Digital Clock and Data Recovery With a Wideband High-Linearity Phase Interpolator., , , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (7): 2511-2520 (2016)A Low-Voltage Low-Phase-Noise 25-GHz Two-Tank Transformer-Feedback VCO., , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (10): 3162-3173 (2018)A 2.56-Gb/s Serial Wireline Transceiver That Supports an Auxiliary Channel in 65-nm CMOS., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (1): 12-22 (2020)A 76-81 GHz CMOS PA with 16-dBm PSAT and 30-dB Amplitude Control for MIMO Automotive Radars., , , , , and . ESSCIRC, page 329-332. IEEE, (2019)54 GHz CMOS LNAs with 3.6 dB NF and 28.2 dB gain using transformer feedback Gm-boosting technique., , , , , , , , , and . A-SSCC, page 185-188. IEEE, (2014)