Author of the publication

Low power magnetic flip-flop based on checkpointing and self-enable mechanism.

, , , , and . NEWCAS, page 1-4. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

On restricted edge-connectivity of lexicographic product graphs., and . Int. J. Comput. Math., 91 (8): 1618-1626 (2014)Matching preclusion for direct product of regular graphs., , and . Discret. Appl. Math., (2020)Matchings extend to Hamiltonian cycles in 5-cube., and . Discussiones Mathematicae Graph Theory, 38 (1): 217-231 (2018)Nanocomputing Block based Multi-Context FPGA., , and . ERSA, page 297-298. CSREA Press, (2009)Low power magnetic flip-flop based on checkpointing and self-enable mechanism., , , , and . NEWCAS, page 1-4. IEEE, (2013)Emerging hybrid logic circuits based on non-volatile magnetic memories., , , , , and . NEWCAS, page 1-4. IEEE, (2013)Design and Fabrication of Full Wheatstone-Bridge-Based Angular GMR Sensors., , , , , , , and . Sensors, 18 (6): 1832 (2018)Magnetic memory (MRAM), a new area for 2D and 3D SoC/SiP design., and . ACM Great Lakes Symposium on VLSI, page 429-430. ACM, (2011)Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells., , , , , , , , , and 4 other author(s). J. Parallel Distributed Comput., 74 (6): 2484-2496 (2014)A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation., , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 71 (3): 1077-1081 (March 2024)