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Disambiguation of "Ronen, Ronny"

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SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput.

, , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2434-2447 (2020)

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Ronen Sircar

Ronen Reichman

Ronen Elishar

Roy Ronen

Ronny Leuschner

Reaktionsmechanismen von Legierungselementen beim rekristallisierenden Glühen zur Schmelztauchveredelung von Mehrphasenstählen. TU Aachen, (2007)
 

Other publications of authors with the same name

Micro-operation cache: a power aware frontend for variable instruction length ISA., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 11 (5): 801-811 (2003)Synchronizing Redundant Cores in a Dynamic DMR Multicore Architecture., , and . IEEE Trans. Circuits Syst. II Express Briefs, 56-II (6): 474-478 (2009)Larrabee: a many-core Intel architecture for visual computing.. Conf. Computing Frontiers, page 225. ACM, (2009)MultPIM: Fast Stateful Multiplication for Processing-in-Memory., , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 1647-1651 (2022)PIMDB: Understanding Bulk-Bitwise Processing In-Memory Through Database Analytics., , , and . CoRR, (2022)Enabling Relational Database Analytical Processing in Bulk-Bitwise Processing-In-Memory., , and . SOCC, page 1-6. IEEE, (2023)CONTRA: Area-Constrained Technology Mapping Framework For Memristive Memory Processing Unit., , , , and . ICCAD, page 150:1-150:9. IEEE, (2020)eXtended Block Cache., , , , , and . HPCA, page 61-70. IEEE Computer Society, (2000)Guest Editors' Introduction: Micro's Top Picks from the Microarchitecture Conferences., and . IEEE Micro, 27 (1): 8-11 (2007)CONCEPT: A Column-Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM., , , , and . IEEE Micro, 39 (1): 33-43 (2019)