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Wrong-Path-Aware Entangling Instruction Prefetcher., и . IEEE Trans. Computers, 73 (2): 548-559 (февраля 2024)Compiler-Assisted Compaction/Restoration of SIMD Instructions., , , , , , и . IEEE Trans. Parallel Distributed Syst., 33 (4): 779-791 (2022)Speculative inter-thread store-to-load forwarding in SMT architectures., , , и . J. Parallel Distributed Comput., (марта 2023)Analysing software prefetching opportunities in hardware transactional memory., , , , , , и . J. Supercomput., 78 (1): 919-944 (2022)Characterization of a List-Based Directory Cache Coherence Protocol for Manycore CMPs., , и . Euro-Par Workshops (2), том 8806 из Lecture Notes in Computer Science, стр. 254-265. Springer, (2014)Exploring Instruction Fusion Opportunities in General Purpose Processors., , , и . MICRO, стр. 199-212. IEEE, (2022)Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks., , , , и . ISCA, стр. 93-104. ACM, (2011)Efficient invisible speculative execution through selective delay and value prediction., , , , и . ISCA, стр. 723-735. ACM, (2019)A new perspective for efficient virtual-cache coherence., и . ISCA, стр. 535-546. ACM, (2013)Complexity-effective multicore coherence., и . PACT, стр. 241-252. ACM, (2012)